NSGA-II based Multi-Objective Genetic Algorithm for Non-Slicing VLSI Floor Planning

VLSI floorplanning is a crucial step in chip design, directly impacting area, wirelength, and power consumption. This paper presents a non-dominated sorting genetic algorithm (NSGA-II) for non-slicing VLSI floorplanning, that incorporates a B*-tree representation and leverages the optimization framework to achieve multi-objective optimization of both area and wirelength. The B*-tree ensures efficient and compact representation of module placement, while NSGA-II uses crossover, mutation, and selection operators that preserve the structural properties of the B*-tree. We evaluate the proposed approach using the Gigascale Systems Research Center (GSRC) benchmark circuits. Experimental results demonstrate that our algorithm outperforms conventional methods, producing balanced Pareto-optimal solutions and effectively reducing area and wirelength.