Deep Reinforcement Learning (DRL) Based Signal Integrity (SI) Performance Optimization Method for Low-Power Double Data Rate (LPDDR) Memory

In this paper, we propose deep reinforcement learning (DRL) based LPDDR memory package optimization method for maximize SI performance. A Markov Decision Process (MDP) is designed to reflect the characteristics of the LPDDR package, employing SI metrics to capture the influence of SoCs with unknown design variables. Furthermore, Agent is designed using multi-stage multi-layer perceptron to handle multiple interrelated design parameters, and is trained on randomly generated SoC packages to address various SoC scenarios. The proposed DRL based optimization method is verified in 6 coupled channels. The optimization performance of the proposed method is confirmed in various SoC channel. The superb optimality performance is also confirmed through comparison with conventional optimization method, and other DRL method.

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Publication Details

Published
2025-08-18
DOI
https://doi.org/10.1109/emcsipi52291.2025.11170156
Primary Topic
CCD and CMOS Imaging Sensors
Type
article
Field-Weighted Citation Impact
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article

Deep Reinforcement Learning (DRL) Based Signal Integrity (SI) Performance Optimization Method for Low-Power Double Data Rate (LPDDR) Memory

Seunghun Ryu, Seonghi Lee, Seungyoung Ahn, Duksoo Kim et al.
CCD and CMOS Imaging Sensors
article

Deep Reinforcement Learning (DRL) Based Signal Integrity (SI) Performance Optimization Method for Low-Power Double Data Rate (LPDDR) Memory

Seunghun Ryu, Seonghi Lee, Seungyoung Ahn, Duksoo Kim, Dongryul Park, Hyunwoo Kim, Dongkyun Kim, Jongwook Kim, Hyun‐Sik Kim
article en

Abstract

In this paper, we propose deep reinforcement learning (DRL) based LPDDR memory package optimization method for maximize SI performance. A Markov Decision Process (MDP) is designed to reflect the characteristics of the LPDDR package, employing SI metrics to capture the influence of SoCs with unknown design variables. Furthermore, Agent is designed using multi-stage multi-layer perceptron to handle multiple interrelated design parameters, and is trained on randomly generated SoC packages to address various SoC scenarios. The proposed DRL based optimization method is verified in 6 coupled channels. The optimization performance of the proposed method is confirmed in various SoC channel. The superb optimality performance is also confirmed through comparison with conventional optimization method, and other DRL method.

SK Group (South Korea) (KR), Korea Advanced Institute of Science and Technology (KR)
Openalex Percentile: Top 74%
CCD and CMOS Imaging Sensors
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