Optimal Mapping of Monte Carlo Analysis for Analog Circuit Designing using Bayesian Neural Networks

In analog/mixed-signal integrated circuit design, prolonged design cycles pose a significant challenge owing to the complexity of circuit simulations. To address this issue, we propose a surrogate model that combines Bayesian neural networks with Monte Carlo analysis to predict circuit characteristics and estimate yield rates efficiently. Our approach uses the DC parameters as inputs to the Bayesian neural network (BNN), enabling the inference of distribution-based performance metrics. We demonstrated that fine-tuning can provide accurate predictions with minimal additional data by training BNN models on datasets from different process nodes (180 and 65 nm). Our method accelerates circuit sizing while maintaining high accuracy, achieving a speedup of over 15 × compared with traditional methods. This study highlights the potential of using BNNs for rapid analog circuit design under varying operational conditions to ensure robustness against process and environmental variations.