Linearization of Power Amplifier with Low Sampling Rate Based on Iterative Learning Control

Aiming at the problem of excessively high digital signal processing rate in the system, this paper proposes an undersampled digital predistortion method based on an iterative learning control structure. Establish the inverse model of the power amplifier at the baseband rate. After obtaining the predistortion coefficient through iteration, perform nonlinear correction on the signal at the transmitter end. Firstly, in the feedback loop of the iterative learning control system structure, a sideband signal prediction module is added. The observed data obtained by the low-sampling-rate ADC is upsampled, and then the high-sampling-rate observed signal with limited bandwidth is restored. Finally, the DPD model was established and the DPD coefficients were extracted. The model coefficients are tracked and adjusted according to the real-time changes of the power amplifier in the terminal device, so as to achieve the purpose of reducing the sampling rate and hardware cost. The simulation results show that for the 64-QAM modulated signal, the EVM performance has improved by $\mathbf{5. 1 \%}$.