Two‐Stage Gate Control to Minimize Inrush Current in Piezoelectric Transformer Based Inductorless ZVS Converter

ABSTRACT A method to control the inrush current of inductorless converters based on piezoelectric transformers (PTs) with high input capacitance is presented. With no magnetic core, inductorless PT based converters are of particular interest in medical equipment intended for use in the vicinity of high magnetic fields. The proposed method involves applying a reduced gate voltage to the converter MOSFETs during start‐up to increase their on‐resistance and decrease dv/dt at the switching point. A higher gate voltage is applied once steady state PT conditions are established to provide efficient operation. The design of the proposed gate drive solution and detailed LTSpice simulation results are described for a 3.6 W, 20 V DC/810 Vpk AC inverter. Due to the lack of commercial PTs with characteristics suitable for ZVS, the design of an emulated PT circuit is described to enable validation by testing. Experimental results successfully validate simulation results for the proposed start‐up circuit.

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Publication Details

Journal
IET Power Electronics
Published
2025-01-01
DOI
https://doi.org/10.1049/pel2.70124
Primary Topic
Advanced DC-DC Converters
Type
article
Field-Weighted Citation Impact
0.00

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article

Two‐Stage Gate Control to Minimize Inrush Current in Piezoelectric Transformer Based Inductorless ZVS Converter

Ajay M. Chole, Maeve Duffy
IET Power Electronics
Advanced DC-DC Converters
article

Two‐Stage Gate Control to Minimize Inrush Current in Piezoelectric Transformer Based Inductorless ZVS Converter

Ajay M. Chole, Maeve Duffy
article en

Abstract

ABSTRACT A method to control the inrush current of inductorless converters based on piezoelectric transformers (PTs) with high input capacitance is presented. With no magnetic core, inductorless PT based converters are of particular interest in medical equipment intended for use in the vicinity of high magnetic fields. The proposed method involves applying a reduced gate voltage to the converter MOSFETs during start‐up to increase their on‐resistance and decrease dv/dt at the switching point. A higher gate voltage is applied once steady state PT conditions are established to provide efficient operation. The design of the proposed gate drive solution and detailed LTSpice simulation results are described for a 3.6 W, 20 V DC/810 Vpk AC inverter. Due to the lack of commercial PTs with characteristics suitable for ZVS, the design of an emulated PT circuit is described to enable validation by testing. Experimental results successfully validate simulation results for the proposed start‐up circuit.

IET Power ElectronicsVol. 18(1)
Ollscoil na Gaillimhe – University of Galway (IE)
University of Galway, College of Science and Engineering, University of Minnesota
Openalex Percentile: Top 74%
Advanced DC-DC Converters
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