CMOS back-end-of-line integration of bilayer ferroelectric tunnel junction in 1-transistor-1-capacitor circuit
• Bilayer ferroelectric tunnel junctions suffer from low ON current density. • 1-transistor-1-capacitor circuit amplifies ferroelectric tunnel junction current. • W-Al 2 O 3 -Hf 0.5 Zr 0.5 O 2 -W ferroelectric tunnel junction is fabricated on CMOS back-end. • ON current amplification by 2.6 times is demonstrated. Ferroelectric tunnel junction (FTJ) devices based on ferroelectric Hf0.5Zr0.5O2 (HZO) have recently gained significant interest as CMOS back-end-of-line integrable low power non-volatile memories for neuromorphic computing applications. In this paper, we demonstrate integration of metal-ferroelectric- dielectric-metal bilayer FTJ devices in the back-end-of-line of a 180 nm CMOS technology chip. We present electrical characteristics of the integrated FTJ devices, including the polarization switching and resistance switching behavior with an ON/OFF current ratio of ∼ 18, and an ON current density of ∼ 24.5 μA/cm 2 at a read voltage of 1.8 V. Furthermore, we also demonstrate a 1-transistor-1-capacitor (1T1C) circuit by connecting a back-end FTJ device with a front-end nMOS transistor, which amplifies the ON current of the FTJ device by 2.6 times. Thus, we show the basic building block for the integration of HZO-based FTJ devices for neuromorphic applications.
Authors
- Muhammad Hamid Raza (ORCID: https://orcid.org/0000-0003-0061-5139)
- Catherine Dubourdieu (ORCID: https://orcid.org/0000-0002-4642-6897)
- Veeresh Deshpande (ORCID: https://orcid.org/0000-0002-0349-4857)
- Keerthana Shajil Nair
Institutions
- Helmholtz-Zentrum Berlin für Materialien und Energie (DE)
- Freie Universität Berlin (DE)
Publication Details
- Journal
- Solid-State Electronics
- Published
- 2025-09-24
- DOI
- https://doi.org/10.1016/j.sse.2025.109255
- Primary Topic
- Ferroelectric and Negative Capacitance Devices
- Type
- article
- Field-Weighted Citation Impact
- 0.00