Theoretical Architecture and Fabrication Techniques of Carbon Nanotube Field-Effect Transistors

Silicon-based transistors face scaling limits from short-channel effects, power crises, and rising costs. Carbon nanotube field-effect transistors (CNTFETs), exploiting quasi-ballistic transport and one-dimensional electrostatics of single-walled carbon nanotubes (SWCNTs), offer superior short-channel control and high performance at sub-20 nm scales. This paper examines recent advances in CNTFET theory and fabrication, covering device principles, structures, chirality-dependent properties, carrier injection, and electrostatic metrics compared to silicon FinFETs. Manufacturing progress includes chirality-selective synthesis, wafer-scale alignment, ultralow-resistance contacts, high-/metal gate integration, and low-damage processes. Comparative analysis reveals that CNTFETs achieve drain-induced barrier lowering (DIBL) and sub-threshold swing (SS) surpassing their silicon counterparts, highlighting their promise for scalable, high-performance post-silicon electronics.