Enhanced Frequency Compensated Three Stage Amplifier using RNMC and Self cascode-DTMOS Transistor
This research work enhances the performance of three stage amplifier. The input stage includes the self cascode structure with DTMOS transistor. Additionally, a Folded FVF (FFVF) is used in conjunction with RNMC to boost the stability of the amplifier. Additionally, double pole zero cancellation is achieved by using a resistor, which helps in enhancing the phase margin (PM). Further, the feed forward path makes the transient response better. TSMC $0.18 \mu \mathrm{~m}$ CMOS technology parameters are used in tanner tool simulations to confirm the amplifier’s functionality. The proposed amplifier provides the GBW and gain of 34.6 MHz and 106 dB, respectively. Further, the amplifier offers the slew rate (SR) of $\mathbf{1 0. 2 4 ~ V} / \boldsymbol{\mu} \mathbf{S}$. The effectiveness of the presented amplifier is verified with the help of figure of merits.
Authors
- Neeta Pandey (ORCID: https://orcid.org/0000-0003-2911-7061)
- Om Krishna Gupta
- Maneesha Gupta (ORCID: https://orcid.org/0000-0003-2495-678X)
Institutions
- Netaji Subhas University of Technology (IN)
- Delhi Technological University (IN)
Publication Details
- Published
- 2025-06-20
- DOI
- https://doi.org/10.1109/conit65521.2025.11167438
- Primary Topic
- Analog and Mixed-Signal Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00