New Method for Generating Test Codes to Detect Multiple Stuck-at-Faults in Combinational Circuits. Part 2

The article is devoted to a new method of generating test codes to detect multiple stuck-at-faults (0/1) type damages in digital combinational PIPO-circuits, which is based on the artificial introduction of non-essential variables and the application of the procedure of q-partition of the system minterms of a given system of functions. Due to the use of the numerical set-theoretic approach, the proposed method differs from the known ones in a relatively simpler practical implementation to detect stuck-at-faults (0/1) type damages both at one point and simultaneously at several points simultaneously of the studied circuit.

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Publication Details

Journal
Information Technologies and Systems (Інформаційні технології та системи)
Published
2025-09-22
DOI
https://doi.org/10.15407/intechsys.2025.03.003
Primary Topic
VLSI and Analog Circuit Testing
Type
article
Field-Weighted Citation Impact
0.00
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article

New Method for Generating Test Codes to Detect Multiple Stuck-at-Faults in Combinational Circuits. Part 2

Bohdan Rytsar
Information Technologies and Systems (Інформаційні технології та системи)
VLSI and Analog Circuit Testing
article

New Method for Generating Test Codes to Detect Multiple Stuck-at-Faults in Combinational Circuits. Part 2

Bohdan Rytsar
article en

Abstract

The article is devoted to a new method of generating test codes to detect multiple stuck-at-faults (0/1) type damages in digital combinational PIPO-circuits, which is based on the artificial introduction of non-essential variables and the application of the procedure of q-partition of the system minterms of a given system of functions. Due to the use of the numerical set-theoretic approach, the proposed method differs from the known ones in a relatively simpler practical implementation to detect stuck-at-faults (0/1) type damages both at one point and simultaneously at several points simultaneously of the studied circuit.

Information Technologies and Systems (Інформаційні технології та системи)Vol. 3(3)
Copiah-Lincoln Community College (US)
Openalex Percentile: Top 72%
VLSI and Analog Circuit Testing
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New Method for Generating Test Codes to Detect Multiple Stuck-at-Faults in Combinational Circuits. Part 2 — Bohdan Rytsar · Information Technologies and Systems (Інформаційні технології та системи) (2025) | TGRS Research Map | TGRS