Choice of rational number of instruction slots in very long instruction word processors

The article is devoted to the problem of selecting a rational (close to optimal) number of individual instructions in very long machine word processors. The peculiarities of the architecture of such processors are the realizable software detection of the hidden potential of parallelism in the source text and its transformation into a form convenient for execution on a given field of computational cores. In this research only the method of information structure analysis and purposeful equivalent (not changing information relations) modifications of algorithms are considered. The developed simulation model allows to implement and compare heuristic methods of parallelization and purposeful modifications of algorithms according to the given criteria and to quantitatively evaluate the results of these methods