Correction Bit Algorithm for Digital Phase Shifter using Perturbation Technique

In RF designs, various parameters can introduce errors that impact performance. Errors due to process variations during fabrication, operation at different temperatures, and parasitic elements from packaging (such as bonding wires causing capacitance and inductance) can lead to frequency-dependent issues, such as amplitude and phase shifts with bandwidth limitations. Most of the errors have been addressed by various authors in the past and are considered and modelled in the PDKs (Process Design Kits). However, it remains challenging to meet all the conditions and resolve every warning during the design process, which can sometimes result in die rejections. The methodology proposed in this work seeks to minimize such rejections by enhancing the reliability of the design under these circumstances. Specifically, a correction algorithm using the perturbation technique is proposed for a 6-bit digital phase shifter design in Si-based 65nm CMOS (Complementary Metal-Oxide-Semiconductor) technology. The correction bit phase value is carefully selected using an algorithm implemented in MATLAB, in addition to the six initially chosen quantization bits. By switching the correction bit on and off, two independent sets of values are generated, which more closely align with the ideal phase curve. This approach has reduced the RMS(Root Mean Square) phase error of the design by 0.5° in the S -band over a 26% bandwidth. Furthermore, the chosen correction bit has increased the operational bandwidth by more than 50%, with only a slight increase in RMS phase error.