A Dual-Direction SCR Featuring Shallow Snapback and High-Temperature Robustness for ESD Protection of Industrial Communication Buses
The reliability standards for on-chip electrostatic discharge (ESD) protection in high-voltage industrial communication buses are stringent, and traditional ESD solutions cannot effectively meet the requirements for high holding voltage (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V} _{h}$</tex-math> </inline-formula>) and high-temperature tolerance in these applications. Therefore, this article presents a dual-direction silicon-controlled rectifier (DDSCR) featuring shallow snapback and high-temperature robustness. At the same size, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V} _{h}$</tex-math> </inline-formula> (38.4 V) of the parallel NPN-enhanced SCR (NPNE_DDSCR), which employs a metal short and no shallow trench isolation (STI), is significantly higher than that of the traditional structure (T_DDSCR) and the parallel NPN structure (NPN_DDSCR). Under high-temperature conditions ranging from <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$50~^{\circ }$</tex-math> </inline-formula>C to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$125~^{\circ }$</tex-math> </inline-formula>C, the structure maintains nanoampere-level leakage current, and the device’s ESD characteristics show no significant degradation. The electrostatic properties of three types of structures were verified based on the 0.18-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula>m bipolar-CMOS–DMOS (BCD) process, and their operating mechanisms were further analyzed using technology computer-aided design (TCAD) simulations. The results show that the NPNE_DDSCR exhibits superior performance, with a human body model (HBM) level exceeding 8 kV, and is suitable for efficient on-chip ESD protection of industrial communication buses.
Authors
- Bingjun Xiong (ORCID: https://orcid.org/0009-0009-7476-1703)
- Qifeng Fu (ORCID: https://orcid.org/0000-0003-2632-8031)
- Yuqin Dou (ORCID: https://orcid.org/0009-0008-5408-7056)
- Wei Liu (ORCID: https://orcid.org/0000-0003-3016-7381)
- Jingjing Liu (ORCID: https://orcid.org/0000-0001-5285-4997)
- Yujie Liu (ORCID: https://orcid.org/0000-0003-0437-7289)
- Ke Zhang (ORCID: https://orcid.org/0009-0000-9550-3847)
- Yang Wang (ORCID: https://orcid.org/0000-0001-8787-666X)
Institutions
- Sun Yat-sen University (CN)
- Hunan Normal University (CN)
- Nanjing University of Posts and Telecommunications (CN)
Publication Details
- Journal
- IEEE Transactions on Electron Devices
- Published
- 2025-09-23
- DOI
- https://doi.org/10.1109/ted.2025.3608742
- Citations
- 2
- Primary Topic
- Electrostatic Discharge in Electronics
- Type
- article
- Field-Weighted Citation Impact
- 1.46