Process Integration of U‐Shape Ambipolar Schottky–Barrier Field‐Effect Transistors

Abstract Research on transistors with various architectures is crucial for developing high‐performance, compact devices, as they improve the functionality of integrated circuits within the same or smaller footprint. Simulation studies have shown that transistors fabricated using a U‐shape channel have a higher functionality as their natural geometry enables the realization of gate‐all‐around structures and long channel lengths within a small footprint. The experimental realization of the transistor is essential for exploring circuit applications. This paper presents the process integration route and the first experimental results of a U‐shape ambipolar Schottky barrier field effect transistor. Also, a detailed explanation of the challenges in fabricating a 3D transistor and the improvement steps are given. The fabricated device demonstrates highly symmetrical on‐currents for both p‐ and n‐branches. Self‐aligned contact formation and atomic force microscopy imaging are used to simplify fabrication and facilitate 3D structural monitoring. In addition, the formation of self‐aligned contacts in the proposed device architecture is significantly simplified compared to traditional 3D architectures. TCAD simulations are also performed to support the experimental findings and demonstrate the device's future potential and scalability. In conclusion, it effectively addresses the challenges of the fabrication of 3D transistors and drives innovations in device design with its silicon‐on‐insulator body.