Implementation of FIR Filter Using Different Adder Architectures

The stability and linear phase characteristics of Finite Impulse Response (FIR) filters make them popular in digital signal processing. In this paper, the performance of FIR filters is examined in relation to different adder architectures, particularly the Square Root Carry Select Adder (SQR-CSA) and the Carry Look Ahead Adder (CLA). When employing these adders, the paper aims to assess the filter's performance, area, delay, and power consumption. Notably, compared to traditional adder techniques, incorporating the CLA into the FIR filter design yields notable improvements in processing speed and lower power consumption. The Xilinx Vivado tool is used to validate these results, which show that FIR filters based on CLA are very effective and ideal for resource constrained environments.