An FPGA-Based Asynchronous and Interleaved Single Photon Counting Receiver for Optical Wireless Communication

Current research on silicon photomultipliers (SiPM) in optical wireless communication (OWC) typically relies on offline evaluations with generic measurement instruments to analyze segments of transmitted data. To bridge the gap between theoretical evaluations in offline and real-world implementation, this paper introduces a novel asynchronous and interleaved single photon detection approach, implemented on the XILINX ZYNQ-7000 FPGA platform. This approach enables real-time photon counting without dead time and eliminates the need for fast pulse detection via a high-frequency clock. To validate the design, a commercially available $1 \mathrm{~mm}^{2}$ SiPM is used to build the receiver prototype. The prototype demonstrates a bit error rate (BER) of $2.45 \times 10^{-3}$ at a 1 Mbps data rate. At this data rate, the average number of detected photons per bit is 7.89, with a $2.45 \%$ deviation from the theoretical Poisson limit for photon detection. The results indicate that the proposed approach offers significant advantages, particularly in terms of low power, low latency, and reduced design complexity, making it highly beneficial for future OWC applications.