Error-Corrected RRAM-Based Compute-in-Memory Accelerator Using Voltage-Clamp Current Mirror

Computational reliability is a promising research direction in computing-in-memory (CIM), particularly in non-volatile memory (NVM) technologies such as resistive random-access memory (RRAM). Due to its outstanding performance and developmental potential, RRAM plays a critical role in advancing CIM research. The high computational reliability, low-cost ADC and low power consumption are the challenges for RRAM CIM. This study proposes an Error-corrected RRAM-based CIM architecture. To solve the problem of excessive calculation current, a voltage clamp current mirror (VCCM) is designed to improve the calculation accuracy and control calculation power consumption. A new quantization method is proposed to avoid the introduction of complex quantization circuits and reduce the energy consumption of quantization. To address the issue of significant errors in small RRAM HRS/LRS, a new error-correction quantization function is proposed. This function better aligns with the computational characteristics of the CIM macro, thereby improving robustness. The macro design is evaluated under TSMC 28-nm technology node. At Vref of 100 mV, the proposed macro can run at 120.5 MHz. The energy efficiency for the CIM macro reaches 78.62 TOPS/W under the condition of 4-bit input and 4-bit output. The calculation accuracy on the MNIST and CIFAR-10 dataset are 99.6% and 91.2%, even with a significant process disturbance and memristor resistance fluctuation.