A 95.43%-Peak-Efficiency Buck Converter with Seamless PWM/PFM Transition and 12.3-μA Quiescent Current for Wide-Load Applications

This study presents a high-efficiency synchronous buck converter IC featuring wide load-range capability and ultra-low power consumption. The design employs an integrated PWM/PFM control scheme where a clamp circuit integrated into the PWM control loop and a clamp-current-dependent frequency-reduction module enable PFM operation under light-load conditions. This architecture achieves seamless PWM-to-PFM transition with minimized output voltage ripple, enhances light-load efficiency, and significantly reduces circuit complexity. Implementation of peak/valley current detection modules elevates sensing accuracy and control precision, thereby improving dynamic response characteristics. A time-division module activation strategy further reduces the controller&#x2019;s quiescent current, optimizing ultra-light-load efficiency. The power-enable control module establishes dual-stability mechanisms for power rails and reference voltages, ensuring controlled module activation only after stable initialization to guarantee proper power sequencing and operational reliability. Fabricated in <inline-formula> <tex-math notation="LaTeX">$0.18\mu $ </tex-math></inline-formula>m BCD technology, measurement results demonstrate stable startup characteristics, smooth PWM/PFM transitions, 95.43% peak efficiency at 8V-to-5V conversion, &#x003E;90% efficiency across the 5mA-6A load range, and <inline-formula> <tex-math notation="LaTeX">$12.3\mu $ </tex-math></inline-formula>A no-load ground current.