A Novel, Single-Step 3D-Printed Shadow Mask Fabrication Method for TFTs

This work presents a low-cost and scalable method for fabricating thin-film transistors (TFTs) using a single-step, 3D-printed shadow mask approach. Room temperature growth of both aluminum-doped zinc oxide (AZO) thin film was used as the semiconductor channel, and zirconium oxide (ZrO2) as the high-k dielectric, and the films were never exposed to any post-annealing treatment. Structural and morphological characterization confirmed smooth, compact films with stable dielectric behavior. Electrical measurements revealed a field-effect mobility of 13.1 cm2/V·s, a threshold voltage of ~4.1 V, and an on/off ratio of ~104, validating effective gate modulation and drain current saturation. The off-state current, estimated from AZO conductivity measurements, was ~10−10 A, while the on-state current reached ~10−6 A. Benchmarking against state-of-the-art devices shows that these transistors rival ALD-processed IGZO TFTs and significantly outperform reported indium-free ZnO/AZO devices, while avoiding scarce indium and costly high-temperature or photolithographic processing. These findings establish 3D-printed shadow masks as a practical alternative to conventional lithography for oxide TFT fabrication. The method offers high device performance with simplified, indium-free, and room-temperature processing, underscoring its potential for scalable, transparent, and flexible electronics.

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Processes
Published
2025-09-18
DOI
https://doi.org/10.3390/pr13092976
Primary Topic
Thin-Film Transistor Technologies
Type
article
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article

A Novel, Single-Step 3D-Printed Shadow Mask Fabrication Method for TFTs

M. Bahoura, Kelsea Yarbrough, Sangram K. Pradhan, Makhes K. Behera
Processes
Thin-Film Transistor Technologies
article

A Novel, Single-Step 3D-Printed Shadow Mask Fabrication Method for TFTs

M. Bahoura, Kelsea Yarbrough, Sangram K. Pradhan, Makhes K. Behera
article en

Abstract

This work presents a low-cost and scalable method for fabricating thin-film transistors (TFTs) using a single-step, 3D-printed shadow mask approach. Room temperature growth of both aluminum-doped zinc oxide (AZO) thin film was used as the semiconductor channel, and zirconium oxide (ZrO2) as the high-k dielectric, and the films were never exposed to any post-annealing treatment. Structural and morphological characterization confirmed smooth, compact films with stable dielectric behavior. Electrical measurements revealed a field-effect mobility of 13.1 cm2/V·s, a threshold voltage of ~4.1 V, and an on/off ratio of ~104, validating effective gate modulation and drain current saturation. The off-state current, estimated from AZO conductivity measurements, was ~10−10 A, while the on-state current reached ~10−6 A. Benchmarking against state-of-the-art devices shows that these transistors rival ALD-processed IGZO TFTs and significantly outperform reported indium-free ZnO/AZO devices, while avoiding scarce indium and costly high-temperature or photolithographic processing. These findings establish 3D-printed shadow masks as a practical alternative to conventional lithography for oxide TFT fabrication. The method offers high device performance with simplified, indium-free, and room-temperature processing, underscoring its potential for scalable, transparent, and flexible electronics.

ProcessesVol. 13(9)
ON Semiconductor (United States) (US), Norfolk State University (US)
National Science Foundation, Core Research for Evolutional Science and Technology
Openalex Percentile: Top 75%
Thin-Film Transistor Technologies
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A Novel, Single-Step 3D-Printed Shadow Mask Fabrication Method for TFTs — M. Bahoura, Kelsea Yarbrough, et al. · Processes (2025) | TGRS Research Map | TGRS