Temperature-induced interfacial intermixing and trap modulation in ONO-based flash memory capacitors

We investigated the effects of hydrogen annealing on the electrical properties and reliability of NAND flash memory capacitors featuring an oxide-nitride-oxide charge-trap dielectric stack. A thin interfacial SiO<i><sub>x</sub></i>N<i><sub>y</sub></i>transition layer, inherently formed between SiO<sub>2</sub>and Si<sub>3</sub>N<sub>4</sub>during processing, was analyzed for compositional and structural changes across annealing temperatures ranging from 300 °C to 500 °C. Key electrical characteristics, including capacitance-voltage behavior, programming speed, data retention, and endurance, were evaluated as a function of annealing temperature. The results demonstrate that annealing in forming gas at temperatures between 400 °C-450 °C optimally enhances device performance by increasing charge injection, reducing interface trap density, and stabilizing the memory window. Structural analysis by transmission electron microscopy and electron energy-loss spectroscopy revealed improved passivation of interface traps and the formation of deep trap states in the nitride, which together contribute to improved charge retention and reduced charge loss through trap-assisted tunneling.

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Publication Details

Journal
Nanotechnology
Published
2025-09-18
DOI
https://doi.org/10.1088/1361-6528/ae08bf
Primary Topic
Semiconductor materials and devices
Type
article
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article

Temperature-induced interfacial intermixing and trap modulation in ONO-based flash memory capacitors

Hamin Park, Hyunwoo Son, Hae Chul Hwang, Kyumin Sim
Nanotechnology
Semiconductor materials and devices
article

Temperature-induced interfacial intermixing and trap modulation in ONO-based flash memory capacitors

Hamin Park, Hyunwoo Son, Hae Chul Hwang, Kyumin Sim
article en

Abstract

We investigated the effects of hydrogen annealing on the electrical properties and reliability of NAND flash memory capacitors featuring an oxide-nitride-oxide charge-trap dielectric stack. A thin interfacial SiO<i><sub>x</sub></i>N<i><sub>y</sub></i>transition layer, inherently formed between SiO<sub>2</sub>and Si<sub>3</sub>N<sub>4</sub>during processing, was analyzed for compositional and structural changes across annealing temperatures ranging from 300 °C to 500 °C. Key electrical characteristics, including capacitance-voltage behavior, programming speed, data retention, and endurance, were evaluated as a function of annealing temperature. The results demonstrate that annealing in forming gas at temperatures between 400 °C-450 °C optimally enhances device performance by increasing charge injection, reducing interface trap density, and stabilizing the memory window. Structural analysis by transmission electron microscopy and electron energy-loss spectroscopy revealed improved passivation of interface traps and the formation of deep trap states in the nitride, which together contribute to improved charge retention and reduced charge loss through trap-assisted tunneling.

NanotechnologyVol. 36(40)
Kwangwoon University (KR), National NanoFab Center (KR)
Openalex Percentile: Top 75%
Semiconductor materials and devices
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