Achieving Low <i>D<sub>it</sub></i> (~5×10<sup>10</sup>eV<sup>-1</sup>cm<sup>-2</sup>), Competitive <i>J<sub>G</sub></i> (~ 5×10<sup>-10</sup> A cm<sup
In this work, we propose and experimentally validate a novel approach to achieve superior interface properties of the SiO 2 /SiC MOS capacitors through a low-temperature oxide deposition technique for gate dielectric followed by a nitridation process. Low interface trap density (~ 5×10 10 eV -1 cm -2 ), robust flat-band voltage stability under positive bias stress, and decent leakage current density (J G ~ 5×10 -10 A cm -2 ) can be unambiguously verified after nitric oxide (NO) gas post-deposition annealing.
Authors
- Navab Singh (ORCID: https://orcid.org/0000-0003-3299-9093)
- Pavan Vudumula
- Mario Saggio
- L. K. Bera (ORCID: https://orcid.org/0000-0003-3171-4463)
- Yee‐Chia Yeo (ORCID: https://orcid.org/0000-0003-1016-1687)
- Qin Gui Roth Voo
- Binni Varghese (ORCID: https://orcid.org/0000-0002-8229-6313)
- Abdul Hannan Yeo (ORCID: https://orcid.org/0000-0003-2375-5732)
- Umesh Chand (ORCID: https://orcid.org/0000-0002-9302-5965)
- Surasit Chung
- Shiv Kumar (ORCID: https://orcid.org/0000-0003-0655-9561)
- Xiao Gong (ORCID: https://orcid.org/0000-0003-0295-2526)
- M. Camalleri
- Jun Xie (ORCID: https://orcid.org/0000-0002-5532-944X)
- Wei Wang (ORCID: https://orcid.org/0000-0002-7450-2519)
- Maurizio Castorina
- Akhil Ranjan
- Tamara Fidler
- Yu Chien
- Patrick Schmid
Institutions
- Agency for Science, Technology and Research (SG)
- National University of Singapore (SG)
- STMicroelectronics (Czechia) (CZ)
Publication Details
- Journal
- Key engineering materials
- Published
- 2025-09-12
- DOI
- https://doi.org/10.4028/p-ya5cwi
- Primary Topic
- Semiconductor materials and devices
- Type
- article
- Field-Weighted Citation Impact
- 0.00