Dynamic, low-latency metro-access network architecture for time-sensitive applications using SOA-based optical switching and supervisory channel FPGA control

This work presents a metro-access network architecture designed to meet the stringent requirements of time-sensitive applications in emerging 5G and 6G networks. The proposed architecture leverages semiconductor optical amplifier-based optical add-drop multiplexers and FPGA-based controllers to enable dynamic, low-latency operation suitable for applications with critical latency and jitter demands. We introduce a control plane protocol that allows for deterministic time-slotted resource reservation, ensuring transparent optical switching and minimizing latency. We validate the architecture through a prototype implementation in a ring network topology, demonstrating latency-bounded operation. Experimental results show that the network achieves sub-microsecond reconfiguration times and stable latency performance, with transparency crossing up to six nodes and a data recovery time of 100 ns at −17dBm, making the architecture a potential solution for federated computing and edge cloud scenarios.