Streamlining Serial Communication Protocol Development on SoC Platforms for Code Reusability

In IoT and wearable systems based on System on Chip (SoC), wired communication with off-chip devices is an essential part of the design. Developing this communication interface is not trivial and often application-dependent, which limits the re-usability of the code. This paper presents an effective method to simplify the development of communication interfaces and reduce their dependency on specific applications by providing useful design guidelines. In particular, our study targets complex computing platform such as heterogeneous SoCs, which integrate a general purpose processor and a Field Programmable Gate Array (FPGA) based programmable logic where hardware accelerators can be implemented. As a result of this work, we have developed a software library that can be reused for all devices utilizing i<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>c serial communication.

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Published
2025-05-26
DOI
https://doi.org/10.1109/ichms65439.2025.11154180
Primary Topic
Advanced Data Storage Technologies
Type
article
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article

Streamlining Serial Communication Protocol Development on SoC Platforms for Code Reusability

Antonio Pellicani, Raffaele Gravina, Fabio Frustaci, Niccolò Petti et al.
Advanced Data Storage Technologies
article

Streamlining Serial Communication Protocol Development on SoC Platforms for Code Reusability

Antonio Pellicani, Raffaele Gravina, Fabio Frustaci, Niccolò Petti, Francesco Porreca
article en

Abstract

In IoT and wearable systems based on System on Chip (SoC), wired communication with off-chip devices is an essential part of the design. Developing this communication interface is not trivial and often application-dependent, which limits the re-usability of the code. This paper presents an effective method to simplify the development of communication interfaces and reduce their dependency on specific applications by providing useful design guidelines. In particular, our study targets complex computing platform such as heterogeneous SoCs, which integrate a general purpose processor and a Field Programmable Gate Array (FPGA) based programmable logic where hardware accelerators can be implemented. As a result of this work, we have developed a software library that can be reused for all devices utilizing i<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>c serial communication.

University of Calabria (IT), University of Bari Aldo Moro (IT)
Openalex Percentile: Top 71%
Advanced Data Storage Technologies
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