Back-End of Line Compatible HZO/ZrO <sub>2</sub> Ferroelectric Capacitor Achieving 2P <sub> <i>r</i> </sub> of 51.1 μC/cm <sup>2</sup> , High- <i>k</i> (~48.4), and Endurance Exceeding 10 <sup>11</sup> Cycles Under Low-Voltage Operation
This study is motivated by the persistent challenge of developing dielectric (DE) materials that simultaneously satisfy the high dielectric constant of eDRAM-driven and robust ferroelectric (FE) properties required by FeRAM within a low thermal budget (≤400 °C) for application in Back-End of Line (BEOL) dual-mode cache/near memory processing units. Here, we address this challenge by a W/Hf<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.5</sub>Zr<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.5</sub>O<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub>(HZO)/ZrO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub>/W structure ferroelectric capacitor and optimizing the thickness ratio of the ZrO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> and HZO layers to construct near morphotropic phase boundary (MPB). The (HZ)6Z4 configuration, with a 4-nm ZrO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> top layer and a 6-nm HZO layer, exhibited enhanced performance with remanent polarization (2<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">P<sub>r</sub></i>~51.1 μC/cm²) and dielectric constant (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">k</i>~48.4) after RTP at 350 °C. The (HZ)6Z4 sample also demonstrates low-voltage operation (~1.7 V), high endurance (>10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sup> cycles) due to a reduced coercive field (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">E<sub>c</sub></i>~1.0 MV/cm), and fast polarization switching (~121 ns). These results show that (HZ)6Z4 nanostack can effectively balance the performance required for low-power BEOL dual-mode cache/near-memory processing units, paving the way for the development of next-generation advanced logic and memory devices.
Authors
- Jiajie Yu
- Hao Zhu (ORCID: https://orcid.org/0000-0003-3890-6871)
- Anna Yuan (ORCID: https://orcid.org/0000-0001-5619-5175)
- David Wei Zhang
- Tianyu Wang (ORCID: https://orcid.org/0000-0001-8114-3481)
- Qingqing Sun (ORCID: https://orcid.org/0000-0002-6533-1834)
- Lei Wang (ORCID: https://orcid.org/0000-0002-9522-3623)
- Lin Chen (ORCID: https://orcid.org/0000-0002-7145-7564)
- Jialin Meng (ORCID: https://orcid.org/0000-0002-2166-3220)
- Yongkai Liu (ORCID: https://orcid.org/0000-0002-3704-4897)
- Kangli Xu (ORCID: https://orcid.org/0000-0002-8077-3593)
Institutions
- Shandong University (CN)
- Institute of Microelectronics (CN)
- Shanghai Fudan Microelectronics (China) (CN)
Publication Details
- Journal
- IEEE Electron Device Letters
- Published
- 2025-09-17
- DOI
- https://doi.org/10.1109/led.2025.3610820
- Primary Topic
- Ferroelectric and Negative Capacitance Devices
- Type
- article
- Field-Weighted Citation Impact
- 0.00