Compact ESD Protection Device for Separated Power Domain Application

Advanced CMOS chips are often integrated with multiple power domains to fulfill sophisticated functionalities, which complicates cross-power domain electrostatic discharge (ESD) protection. In this work, a novel silicon-controlled rectifier (SCR) device, named nMOS-triggered dual-power SCR (NMT_DP_SCR), featuring up to 12 discharge paths for ESD protection, is proposed and demonstrated in a 0.18-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula>m CMOS process. The NMT_DP_SCR, with embedded multiple discharge paths, is optimized for ESD protection in advanced CMOS technologies with isolated power domains. Among the 12 discharge paths, the most vulnerable path achieves a transmission line pulse (TLP) second breakdown current (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I} _{\text {t}{2}}$</tex-math> </inline-formula>) of 3.78 A and a human-body model (HBM) ESD robustness of 4500 V. The full-chip ESD protection capability of the NMT_DP_SCR device is further verified through integration with a level shifter across two separate power domains. A record-high figure of merit (FoM), evaluated as the most vulnerable discharge current times the number of the discharge paths per unit area, is achieved by the proposed NMT_DP_SCR device.