Effect of electroplating current density and post-annealing on the warpage and reliability of redistribution layer for advanced semiconductor package
• Electroplating current density and post-annealing conditions significantly affected the residual stress formation in the redistribution layer structure. • The optimized step plating reduced warpage by about 20% and increased fatigue life by about 10% compared with uniform plating under identical average current density conditions. • The post-annealing process near the glass transition temperature reduced warpage by more than 60% and enhanced fatigue life by over 10% through stress relaxation based on the viscoelastic behavior of the photo-imageable dielectric layer. • Fatigue reliability was evaluated through thermal cycling and Goodman analysis, showing good agreement with the stress behavior obtained by finite element analysis. In this study, the warpage and thermal fatigue reliability of the redistribution layer (RDL) were improved by optimizing the electroplating current density and post-annealing process to control residual stress. The residual stress of the electroplated copper layer and the cure shrinkage of the photo-imageable dielectric (PID) were evaluated using bi-layer beam specimens designed based on Timoshenko beam theory. To analyze the mechanism of residual stress generation in the copper layer, the grain size was quantified using X-ray diffraction (XRD) and the coefficient of thermal expansion (CTE) was measured using a thermomechanical analyzer (TMA). Warpage and thermal fatigue reliability were evaluated under varying electroplating current densities and post-annealing conditions. These experimental results were validated by comparing them with stress analysis data obtained through finite element analysis (FEA). In the RDL structure, the optimized current density condition effectively reduced the residual tensile stress in the electroplated copper layer and improved both warpage and thermal fatigue life. In addition, the post-annealing relieved cure shrinkage-induced stress in the PID, enhancing the reliability of the RDL structure. The results of this study are expected to contribute to improved yield and thermomechanical reliability in advanced semiconductor packages.
Authors
- Jong‐In Shim (ORCID: https://orcid.org/0000-0002-1305-074X)
- T. G. Kim
- Tae‐Hoon Kim (ORCID: https://orcid.org/0000-0002-3505-4899)
- Sang-Il Kim (ORCID: https://orcid.org/0009-0003-3191-5297)
- Hak‐Sung Kim (ORCID: https://orcid.org/0000-0002-6076-6636)
- Ju-Hyun Baek
Institutions
- Samsung (South Korea) (KR)
- Hanyang University (KR)
Publication Details
- Journal
- Materials & Design
- Published
- 2025-09-16
- DOI
- https://doi.org/10.1016/j.matdes.2025.114732
- Primary Topic
- 3D IC and TSV technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00