An On-line BISD Triggering Scheme Based on the CAC-compatible Error Detection Code for TSV Array

The through silicon via (TSV) array plays the significant role of vertical electrical interconnection in the three-dimensional stacked integrated circuits. The TSV faults and the inter-TSV crosstalk are two issues that must be addressed for the effective and reliable transmission in TSV arrays. The forbidden transition free (FTF) and forbidden pattern free (FPF) crosstalk avoidance code (CAC) can suppress the crosstalk in TSV array, and the built-in self-diagnosis (BISD) and self-repair techniques are able to localize and repair the TSV faults, respectively. The BISD usually consumes a non-negligible amount of time in the diagnosis mode. So the periodic BISD schemes have a dilemma between the transmission performance and the efficiency of fault detection. The on-demand BISD schemes have been applied to address this issue. This paper proposes a new on-line BISD triggering scheme based on the CAC-compatible error detection code (EDC). The proposed scheme checks the data transmitted through the TSV array in the working mode. And the BISD is invoked in time only if the EDC codecs detect errors. Compared with the existing similar schemes, the proposed scheme does not degrade the crosstalk suppression effect of the FTF/FPF-CAC methods, and it achieves a better balance in terms of the fault detection ability and the hardware overhead.