An Interference-Resilient 120°-Apart Pseudo-I/Q BLE-Compatible Wake-Up Receiver Achieving −21 dB SIR, −94 dBm Sensitivity, and 4-D Wake-Up Signature

Wake-up receivers (WuRXs) help to cut down the average power consumed by the wireless devices in the Internet of things (IoT). Compared to the non-standard designs, the standard (e.g. BLE-compliant) WuRX chips can be integrated seamlessly into the widely-deployed infrastructures, while there are more design challenges since the BLE-compliant WuRX should be resilient to adjacent-channel interferes as well as realize a high sensitivity. In traditional BLE-compliant WuRXs, the interferes were suppressed by an FBAR filter or a low-noise local oscillator (LO) generator, with the penalty of sensitivity degradation or additional power consumption. The existing edge-combine LO generating method can cut down the power consumption, while the increased LO noise significantly degraded the signal-to-interference ratio (SIR) performance. In this work, we have demonstrated a BLE-compliant WuRX chip that improves both the SIR and sensitivity with low power dissipation. Instead of the conventional I/Q path with 90 degrees out of the phase, a pseudo-I/Q dual-downconversion structure is proposed to offer a WuRX driven by 120-degree-apart ultra-low-power LOs signals, which helps to improve the SIR performance due to the lower LO noise than the conventional edge-combine methods. In addition, a dummy down-converter based mismatch-cancellation technique is proposed to improve the image rejection ratio (IRR) and sensitivity. Fabricated by a 65nm CMOS process, the proposed BLE-compliant WuRX chip achieves -21dB SIR in the adjacent channel as well as -94dBm sensitivity at the cost of only <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$306\mu $</tex-math> </inline-formula>W power.