GTN-Path: Efficient Path Timing Prediction through Waveform Propagation with Graph Transformer
As technology nodes shrink, static timing analysis (STA) must balance accuracy and efficiency to ensure circuit functionality. Graph-based analysis (GBA) is fast but pessimistic, while path-based analysis (PBA) offers higher accuracy with an expensive runtime cost. However, GBA and PBA rely on lookup table (LUT)-based standard cell libraries, introducing accuracy losses compared to accurate SPICE simulations at advanced technology nodes. This work presents GTN-Path, an efficient post-layout path timing prediction method based on waveform propagation and graph transformer network (GTN). GTN-Path captures structural information to accurately predict waveforms by modeling standard cells and interconnects as graphs. Compared to HSPICE simulations, GTN-Path predicts waveforms with $2.98 \%$ error and delay with $2.96 \%$ error, achieving a speedup of $3510 \times$. Additionally, compared with the sign-off STA tool, the GTN-Path achieves a speedup of $12 \times$.
Authors
- Li Shang (ORCID: https://orcid.org/0000-0003-3944-7531)
- Fan Yang (ORCID: https://orcid.org/0000-0003-2164-8175)
- Lihao Liu (ORCID: https://orcid.org/0009-0002-6431-7392)
- Yunhui Li (ORCID: https://orcid.org/0009-0002-2995-7917)
- Beisi Lu
Institutions
- Fudan University (CN)
- Shanghai Fudan Microelectronics (China) (CN)
Publication Details
- Published
- 2025-06-22
- DOI
- https://doi.org/10.1109/dac63849.2025.11132846
- Citations
- 1
- Primary Topic
- Low-power high-performance VLSI design
- Type
- article
- Field-Weighted Citation Impact
- 0.73