MIA-aware FinFlex Cell Legalization with Power-Driven Cell Version Substitution

FinFlex standard cells have been proposed in sub-3 nm process nodes by TSMC to offer great design flexibility and a good trade-off between performance, power, and area efficiency. In the FinFlex technology, each cell type has a number of versions, varying in cell heights and threshold voltages, enabling flexible cell substitution for placement optimization. This paper presents the first work in the literature on standard cell legalization for the FinFlex technology, addressing cell version substitution, power efficiency, and minimum implant area (MIA) constraints. Our proposed algorithm comprises three stages: intra-row violationaware pre-processing considering timing and power levels, directed acyclic graph-based initial legalization with cell version substitution, and dynamic programming-based inter-row violation removal. Experimental results show the superior performance of our approach over a baseline using state-of-the-art techniques.

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Publication Details

Published
2025-06-22
DOI
https://doi.org/10.1109/dac63849.2025.11133187
Primary Topic
Semiconductor materials and devices
Type
article
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article

MIA-aware FinFlex Cell Legalization with Power-Driven Cell Version Substitution

Dawei Huang, Shao‐Yun Fang
Semiconductor materials and devices
article

MIA-aware FinFlex Cell Legalization with Power-Driven Cell Version Substitution

Dawei Huang, Shao‐Yun Fang
article en

Abstract

FinFlex standard cells have been proposed in sub-3 nm process nodes by TSMC to offer great design flexibility and a good trade-off between performance, power, and area efficiency. In the FinFlex technology, each cell type has a number of versions, varying in cell heights and threshold voltages, enabling flexible cell substitution for placement optimization. This paper presents the first work in the literature on standard cell legalization for the FinFlex technology, addressing cell version substitution, power efficiency, and minimum implant area (MIA) constraints. Our proposed algorithm comprises three stages: intra-row violationaware pre-processing considering timing and power levels, directed acyclic graph-based initial legalization with cell version substitution, and dynamic programming-based inter-row violation removal. Experimental results show the superior performance of our approach over a baseline using state-of-the-art techniques.

National Taiwan University of Science and Technology (TW)
Openalex Percentile: Top 76%
Semiconductor materials and devices
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