SeDA: Secure and Efficient DNN Accelerators with Hardware/Software Synergy

Ensuring the confidentiality and integrity of DNN accelerators is paramount across various scenarios spanning autonomous driving, healthcare, and finance. However, current security approaches typically require extensive hardware resources, and incur significant off-chip memory access overheads. This paper introduces SeDA, which utilizes 1) a bandwidth-aware encryption mechanism to improve hardware resource efficiency, 2) optimal block granularity through intra-layer and inter-layer tiling patterns, and 3) a multi-level integrity verification mechanism that minimizes, or even eliminates, memory access overheads. Experimental results show that SeDA decreases performance overhead by over 12% for both server and edge neural processing units (NPUs), while ensuring robust scalability.<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sup><sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sup>SeDA source code:https://github.com/wayne4s/seda.git

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Publication Details

Published
2025-06-22
DOI
https://doi.org/10.1109/dac63849.2025.11133180
Primary Topic
Radiation Effects in Electronics
Type
article
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article

SeDA: Secure and Efficient DNN Accelerators with Hardware/Software Synergy

Zihao Xuan, Rongliang Fu, Luhong Liang, Lang Feng et al.
Radiation Effects in Electronics
article

SeDA: Secure and Efficient DNN Accelerators with Hardware/Software Synergy

Zihao Xuan, Rongliang Fu, Luhong Liang, Lang Feng, Tsung-Yi Ho, Yuzhong Jiao, Zhongrui Wang, Ning Lin, Xuan Wei
article en

Abstract

Ensuring the confidentiality and integrity of DNN accelerators is paramount across various scenarios spanning autonomous driving, healthcare, and finance. However, current security approaches typically require extensive hardware resources, and incur significant off-chip memory access overheads. This paper introduces SeDA, which utilizes 1) a bandwidth-aware encryption mechanism to improve hardware resource efficiency, 2) optimal block granularity through intra-layer and inter-layer tiling patterns, and 3) a multi-level integrity verification mechanism that minimizes, or even eliminates, memory access overheads. Experimental results show that SeDA decreases performance overhead by over 12% for both server and edge neural processing units (NPUs), while ensuring robust scalability.<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sup><sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sup>SeDA source code:https://github.com/wayne4s/seda.git

Sun Yat-sen University (CN), Chinese University of Hong Kong (HK), Shenzhen University (CN), Hong Kong Science and Technology Parks Corporation (HK), Southern University of Science and Technology (CN), The Seventh Affiliated Hospital of Sun Yat-sen University (CN), University of Hong Kong (HK)
Openalex Percentile: Top 76%
Radiation Effects in Electronics
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