YOCO: A Hybrid In-Memory Computing Architecture with 8-bit Sub-PetaOps/W In-Situ Multiply Arithmetic for Large-Scale AI
In this paper, we further explore the potential of analog in-memory computing (AiMC) and introduce an innovative artificial intelligence (AI) accelerator architecture named YOCO, featuring three key proposals: (1) YOCO proposes a novel 8-bit in-situ multiply arithmetic (IMA) achieving 123.8 TOPS/W energy-efficiency and 34.9 TOPS throughput through efficient charge-domain computation and time-domain accumulation mechanism. (2) YOCO employs a hybrid ReRAM-SRAM memory structure to balance computational efficiency and storage density. (3) YOCO tailors an IMC-friendly attention computing flow with an efficient pipeline to accelerate the inference of transformer-based AI models. Compared to three SOTA baselines, YOCO on average improves energy efficiency by up to $3.9 \times \sim 19.9 \times$ and throughput by up to $6.8 \times \sim 33.6 \times$ across $10 \mathrm{CNN} /$ transformer models.
Authors
- Chen Song (ORCID: https://orcid.org/0000-0003-1918-5052)
- Zihao Xuan (ORCID: https://orcid.org/0000-0002-4573-4556)
- Zi-Jia Su (ORCID: https://orcid.org/0000-0001-5566-0549)
- Xuan Wei (ORCID: https://orcid.org/0000-0002-0699-948X)
- Yuxuan Yang (ORCID: https://orcid.org/0000-0001-9481-4387)
- Yajian Kang
Institutions
- University of Science and Technology of China (CN)
- Hong Kong University of Science and Technology (HK)
Publication Details
- Published
- 2025-06-22
- DOI
- https://doi.org/10.1109/dac63849.2025.11133156
- Citations
- 1
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.73