VSpGEMM: Exploiting Versal ACAP for High-Performance SpGEMM Acceleration

Sparse general matrix-matrix multiplication (SpGEMM) serves as a fundamental operation in real-world applications such as deep learning. Different from general matrix multiplication, matrices in SpGEMM are highly sparse and therefore require a compact representation. This places an additional burden on data preprocessing and exchanging and also causes irregular memory access patterns, which can in turn lead to communication and computation bottlenecks. To break these bottlenecks, we present VSpGEMM, a hardware accelerator for SpGEMM that is tailored and optimized on Versal ACAP. Firstly, a new storage format called BCSX is proposed in VSpGEMM, which offers a unified and block-wise compression strategy to deal with both row-major and columnmajor representation of non-zero data, enabling fixed-pattern memory accesses and effective data preloading. Secondly, a multi-level tiling mechanism is introduced to decompose the holistic SpGEMM into multiple computation granularities that fit into the AI Engines (AIEs) on Versal in a hierarchical manner, enhancing data reuse. Thirdly, a hybrid partitioning scheme is presented to orchestrate both the AIEs and programmable logic (PL) for intermediate product merging, which together resolve the issues of high memory utilization and communication demand. Experimental results demonstrate a $2.65 \times$ speedup over state-of-the-art (SOTA) GEMM design on Versal and an average $33.62 \times$ improvement in energy efficiency compared to cuSPARSE on RTX 4090 GPU, showing the efficacy of VSpGEMM.

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Publication Details

Published
2025-06-22
DOI
https://doi.org/10.1109/dac63849.2025.11132619
Citations
1
Primary Topic
Advanced Data Storage Technologies
Type
article
Field-Weighted Citation Impact
1.49
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VSpGEMM: Exploiting Versal ACAP for High-Performance SpGEMM Acceleration

Jianwang Zhai, Kang Zhao, Xinya Luan, Kai Shi et al.
1 citations
Advanced Data Storage Technologies
1.49
article

VSpGEMM: Exploiting Versal ACAP for High-Performance SpGEMM Acceleration

Jianwang Zhai, Kang Zhao, Xinya Luan, Kai Shi, Zhe Lin
article en
1 citations

Abstract

Sparse general matrix-matrix multiplication (SpGEMM) serves as a fundamental operation in real-world applications such as deep learning. Different from general matrix multiplication, matrices in SpGEMM are highly sparse and therefore require a compact representation. This places an additional burden on data preprocessing and exchanging and also causes irregular memory access patterns, which can in turn lead to communication and computation bottlenecks. To break these bottlenecks, we present VSpGEMM, a hardware accelerator for SpGEMM that is tailored and optimized on Versal ACAP. Firstly, a new storage format called BCSX is proposed in VSpGEMM, which offers a unified and block-wise compression strategy to deal with both row-major and columnmajor representation of non-zero data, enabling fixed-pattern memory accesses and effective data preloading. Secondly, a multi-level tiling mechanism is introduced to decompose the holistic SpGEMM into multiple computation granularities that fit into the AI Engines (AIEs) on Versal in a hierarchical manner, enhancing data reuse. Thirdly, a hybrid partitioning scheme is presented to orchestrate both the AIEs and programmable logic (PL) for intermediate product merging, which together resolve the issues of high memory utilization and communication demand. Experimental results demonstrate a $2.65 \times$ speedup over state-of-the-art (SOTA) GEMM design on Versal and an average $33.62 \times$ improvement in energy efficiency compared to cuSPARSE on RTX 4090 GPU, showing the efficacy of VSpGEMM.

Beijing University of Posts and Telecommunications (CN), Sun Yat-sen University (CN)
Openalex Percentile: Top 13%
Advanced Data Storage Technologies
1.49
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