p-n-p Biristor With a Silicon Nanowire

The p-n-p bi-stable resistor (biristor), complementary to an n-p-n biristor, is demonstrated on a bulk substrate in the form of a silicon nanowire (SiNW). It consists of a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${p}^{+}$ </tex-math></inline-formula>-emitter, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${n}^{{0}}$ </tex-math></inline-formula>-base, and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${p}^{+}$ </tex-math></inline-formula>-collector, with each electrode having inverted polarity compared to an n-p-n biristor. This p-n-p biristor also exhibits the characteristics of a single-transistor latch (STL), similar to its counterpart, the n-p-n biristor. The p-n-p biristor can also be applied to a steep slope device, a ternary device, an artificial neuron, a relaxation oscillator, and a true random number generator, akin to n-p-n biristor applications.