Codesign of Dual-Gain X-Band 10-W Reflective Limiter and Low-Noise Amplifier in 0.15-μm GaAs pHEMT Technology

This work introduces a highly effective and robust design methodology for the concurrent realization of a high-power, integrated reflective transistor-based limiter and a low-noise amplifier (LNA), incorporating a novel biasing architecture robust against process and temperature variations. To significantly enhance the power handling capability of the limiter while preserving the low-noise performance of the LNA, a transistor-based configuration is proposed, featuring a new leakage reduction technique. Additionally, transistor-level protection mechanisms are implemented in all gain stages to mitigate excessive gate–source voltage swings across all three amplification stages, ensuring minimal degradation of the overall noise figure (NF). The integrated codesigned limiter-LNA employs an innovative bias circuit that tightly regulates gain stage currents, exhibiting only ±12% fluctuation under process variations and demonstrating robust thermal performance. A key advantage of the proposed architecture is its inherent out-of-band signal rejection, which eliminates the need for off-chip band-selection filters, thereby simplifying the system design and reducing cost. Fabricated in 0.15-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula>m AlGaAs–InGaAs pHEMT technology, the circuit reliably handles continuous wave (CW) input powers exceeding 10 W. It achieves a low average NF of 2.1 dB and delivers 25 dB gain, with an 8 dB gain switching capability while maintaining output-referred linearity merits across the 8.5–10.5 GHz bandwidth. The proposed limiter-LNA demonstrates an average output 1-dB-compression point and third-order intercept points of 14 dBm and 28 dBm, respectively, at 9.5 GHz for both gain modes, drawing 82 mA dc current from 3.5 V supply voltage.