A Robust Post-Processing Method for SSLPUF Bit Error Rate Mitigation

The rapid proliferation of embedded devices in the Internet of Things (loT) era has intensified security vulnerabilities in edge computing systems. As an emerging hardware security primitive, Semiconductor Superlattice Physical U nclonable Functions (SSLPUF) leverage nanoscale superlattice physical characteristics to provide device authentication and data protection. However, their practical deployment is hindered by inherent instability manifested through Bit Error Rate (BER) degradation and response misalignment. This paper presents a highly robust post-processing algorithm for superlattices, which consists of frame synchronization and Time Majority Voting (TMV) algorithm. The experimental results show that compared with the original response, the maximum BER is reduced by 27.41 % after using precise alignment, and 34.87% after using precise alignment and TMV. The high robust post-processing method combining frame synchronization and TMV algorithm can effectively reduce the instability of SSLPUF, greatly improving the reliability and robustness, and is expected to play an important role in the future Internet of Things.