Reconfigurable Technology in Streaming Data Processor

Reconfigurable processor technology allows hardware to dynamically adapt to various computational tasks, offering a promising path for accelerating streaming data applications. This paper proposes a coarse-grained reconfigurable streaming data processor architecture that emphasizes fast task switching and a data-driven execution mechanism. We discuss the importance of reconfigurable processors in the context of modern AI and communication workloads and review related studies on coarse-grained reconfigurable arrays (CGRAs) and dynamic scheduling mechanisms. The proposed architecture, called the Reconfigurable Streaming Data Processor (RSDP), focuses on its reconfiguration process and task switching mechanism.The architecture operates at 600 MHz, features 256 KB of global memory and 32 KB of local memory, supports INT16/FP16 data precision, and achieves a peak performance of 644 GMAC/s. A detailed evaluation of task switching latency shows that our design completes context switching in only 169 clock cycles in average, significantly outperforming previous CGRA scheduling approaches (244–428 cycles) and the latest elastic scheduling scheme (289 cycles). We also provide a comparative analysis of these schemes.Overall, experimental results demonstrate that a data-driven reconfigurable architecture with a rapid reconfiguration mechanism can significantly improve the performance of streaming data processing tasks.