Performance Assessment of a PV-fed Double Boost Nine Level Inverter with Optimized Switch Count

This paper focuses on a single phase boost multilevel inverter that is mainly suitable for PV applications. This double-boost nine-level (DBNL) inverter enhances system performance by employing switched capacitors (SCs) for self-voltage balancing and boosting. By introducing a single ground connection, the PV parasitic impedance is eliminated and, removing the necessity for galvanic separation, the topology achieves nearly negligible leakage current. The reduced average number of conducting switches per voltage level, the fewer semiconductor total switch count, the lower total standing voltage, and the easier control without extra sensors are some of the main benefits of this topology. The detailed performance analysis is done for this inverter with different switching schemes including phase disposition PWM, phase opposition disposition PWM, alternative phase opposition disposition PWM and nearest level control PWM. Comparison with current topologies demonstrates that the suggested architecture delivers better performance. The DBNL inverter can be a better option to integrate PV systems to the grid as well as for industrial drives.

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Publication Details

Published
2025-06-27
DOI
https://doi.org/10.1109/apci65531.2025.11136826
Primary Topic
Multilevel Inverters and Converters
Type
article
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article

Performance Assessment of a PV-fed Double Boost Nine Level Inverter with Optimized Switch Count

Anjali Anand, P Sudina
Multilevel Inverters and Converters
article

Performance Assessment of a PV-fed Double Boost Nine Level Inverter with Optimized Switch Count

Anjali Anand, P Sudina
article en

Abstract

This paper focuses on a single phase boost multilevel inverter that is mainly suitable for PV applications. This double-boost nine-level (DBNL) inverter enhances system performance by employing switched capacitors (SCs) for self-voltage balancing and boosting. By introducing a single ground connection, the PV parasitic impedance is eliminated and, removing the necessity for galvanic separation, the topology achieves nearly negligible leakage current. The reduced average number of conducting switches per voltage level, the fewer semiconductor total switch count, the lower total standing voltage, and the easier control without extra sensors are some of the main benefits of this topology. The detailed performance analysis is done for this inverter with different switching schemes including phase disposition PWM, phase opposition disposition PWM, alternative phase opposition disposition PWM and nearest level control PWM. Comparison with current topologies demonstrates that the suggested architecture delivers better performance. The DBNL inverter can be a better option to integrate PV systems to the grid as well as for industrial drives.

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Multilevel Inverters and Converters
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Performance Assessment of a PV-fed Double Boost Nine Level Inverter with Optimized Switch Count — Anjali Anand, P Sudina · (2025) | TGRS Research Map | TGRS