FPGA Implementation of Turbo Encoder for Digital Communication Systems

During this period of sophisticated digital communication systems, the focus requires appropriate measures to be taken in ensuring data integrity, as well as ensuring a high level of transmission accuracy. One of the techniques that can help improve transfer speed reliability is the Turbo algorithm which is specifically known for its best error correction capabilities. It plays high importance for in-vehicle emergency systems like the emergency call (eCall) system for quick and reliable data transmission for life saving purposes. In this paper turbo encoder for forward error correction was designed and implemented on Zynq UltraScale+ FPGA using Xilinx Vivado. The implementation was affirmed through simulation and hardware synthesis resulting in 60% decrease in the overall processing time and also 75 % increase in efficiency of logic utilization in the parallel computation approach.