Design of Low Power & High Speed Booth’s Multiplier

This document presents the design of an Radix -2 and Radix-4 Booth's multiplier implemented in Verilog. Multiplier circuits play a crucial role in the advancement of various arithmetic operations. All communication signal processing tasks utilize multipliers. Additionally, this Booth's multiplier finds applications in cryptography. The Booth’s multiplier is implemented in Vivado 2024 software in Verilog and implemented on Artix-7 FPGA with Xilinx part XC7A100T-CSG324. The analysis compares Binary, Radix 2, and Radix 4 multipliers, revealing that Radix 4 uses fewer resources than the other two. Power dissipation required for Radix 4 is less as compared to the Radix 2 multiplier.