Implementation of Radix-4 Booth Multiplier using Data Static Segmentation

Multipliers serve as fundamental components in various digital signal processing applications, including convolution, correlation, and filters. Nevertheless, traditional array multipliers and Vedic multipliers have been associated with increased resource utilization in terms of area, power, and delay. As a result, this study concentrates on designing and implementing a variable-width Radix-4 Booth multiplier employing a technique known as data static segmentation (DSS). The generation of partial products is achieved through Radix-4-modified Booth encoding. Subsequently, these partial product bits are added in parallel using a recoding adder with a reduced number of stages. Through simulation, it was evident that the proposed DSS-Radix-4 Booth multiplier (DSS-R4BM) outperforms conventional multipliers in terms of area, delay, and power efficiency.