StageWise: Accelerating Persistent Key-Value Stores by Thread Model Redesigning

With the emergence of fast NVMe SSDs, key-value stores are becoming more CPU-efficient in order to reap their bandwidth. However, current CPU-optimized key-value stores adopt suboptimal intra- and inter-thread models, hence incurring memory-level stalling and load imbalance that hinder cores from realizing their full potential. <p xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">We present S<small>TAGE</small>W<small>ISE</small>, an CPU-efficient key-value store on fast NVMe SSDs with high throughput. To achieve this, we introduce a new thread model for StageWise to process KV requests. Specifically, S<small>TAGE</small>W<small>ISE</small> converts the processing of each KV request into multiple asynchronous stages, and thus enables pipelining across all stages. S<small>TAGE</small>W<small>ISE</small> further introduces a client-driven share-index architecture to ease inter-thread load imbalance and maximize the pipelining opportunity. Guided by Little’s Law, S<small>TAGE</small>W<small>ISE</small> improves concurrency, and therefore efficiently uses CPU to reach higher throughput. Extensive experimental results show that S<small>TAGE</small>W<small>ISE</small> outperforms CPUoptimized key-value stores (e.g., KVell) by up to 3.5× with writeintensive workloads, and storage-optimized ones (e.g., RocksDB) by over an order of magnitude. S<small>TAGE</small>W<small>ISE</small> also shows higher read performance and excellent scalability under various workloads.

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Publication Details

Journal
IEEE Transactions on Computers
Published
2025-09-03
DOI
https://doi.org/10.1109/tc.2025.3605763
Primary Topic
Peer-to-Peer Network Technologies
Type
article
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article

StageWise: Accelerating Persistent Key-Value Stores by Thread Model Redesigning

Youmin Chen, zhihua Li, Qing Wang, Youyou Lu et al.
IEEE Transactions on Computers
Peer-to-Peer Network Technologies
article

StageWise: Accelerating Persistent Key-Value Stores by Thread Model Redesigning

Youmin Chen, zhihua Li, Qing Wang, Youyou Lu, Jiwu Shu
article en

Abstract

With the emergence of fast NVMe SSDs, key-value stores are becoming more CPU-efficient in order to reap their bandwidth. However, current CPU-optimized key-value stores adopt suboptimal intra- and inter-thread models, hence incurring memory-level stalling and load imbalance that hinder cores from realizing their full potential. <p xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">We present S<small>TAGE</small>W<small>ISE</small>, an CPU-efficient key-value store on fast NVMe SSDs with high throughput. To achieve this, we introduce a new thread model for StageWise to process KV requests. Specifically, S<small>TAGE</small>W<small>ISE</small> converts the processing of each KV request into multiple asynchronous stages, and thus enables pipelining across all stages. S<small>TAGE</small>W<small>ISE</small> further introduces a client-driven share-index architecture to ease inter-thread load imbalance and maximize the pipelining opportunity. Guided by Little’s Law, S<small>TAGE</small>W<small>ISE</small> improves concurrency, and therefore efficiently uses CPU to reach higher throughput. Extensive experimental results show that S<small>TAGE</small>W<small>ISE</small> outperforms CPUoptimized key-value stores (e.g., KVell) by up to 3.5× with writeintensive workloads, and storage-optimized ones (e.g., RocksDB) by over an order of magnitude. S<small>TAGE</small>W<small>ISE</small> also shows higher read performance and excellent scalability under various workloads.

IEEE Transactions on ComputersVol. 74(12)
Shanghai Jiao Tong University (CN), Tsinghua University (CN)
Openalex Percentile: Top 73%
Peer-to-Peer Network Technologies
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StageWise: Accelerating Persistent Key-Value Stores by Thread Model Redesigning — Youmin Chen, zhihua Li, et al. · IEEE Transactions on Computers (2025) | TGRS Research Map | TGRS