EvaCAM: A Circuit-Level Evaluation Tool for General Content Addressable Memories

Content addressable memories (CAMs) are special-purpose in-memory computing units that support parallel searches directly in memory. There is growing interest in CAMs for data-intensive applications such as machine learning, data mining, and bioinformatics, which has led to a rapidly growing CAM design space. CAM cells can be implemented exclusively by CMOS or with various non-volatile memory (NVM) devices. In addition to traditional binary and ternary CAMs (BCAMs and TCAMs), analog CAM (ACAM) and multi-bit CAM (MCAM) designs have recently been introduced, which could further improve density, and also support unique in-memory distance functions. Furthermore, aside from the widely-used exact match function, CAM-based approximate match functions, such as threshold match and best match, have been proposed to further extend the utility of CAMs to new application spaces. As the CAM design space is large, evaluating different CAM design options for a given application is both crucial and challenging. This paper presents EvaCAM, a circuit-level modeling and evaluation tool for CAMs. EvaCAM supports TCAM, ACAM, and MCAM designs implemented in either CMOS or NVMs, for both exact and approximate match functions. It also allows for the exploration of different CAM designs under various optimization targets. EvaCAM has been validated against measured data from fabricated chips and detailed SPICE simulations. A comprehensive design space exploration for CAMs is provided to illustrate the impact of various design decisions and to demonstrate the use cases of EvaCAM.

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Publication Details

Journal
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Published
2025-09-03
DOI
https://doi.org/10.1109/tcad.2025.3605857
Primary Topic
Network Packet Processing and Optimization
Type
article
Field-Weighted Citation Impact
0.00

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article

EvaCAM: A Circuit-Level Evaluation Tool for General Content Addressable Memories

Michael Niemier, Ruibin Mao, Mohammad Mehdi Sharifi, Kunshi Wang et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Network Packet Processing and Optimization
article

EvaCAM: A Circuit-Level Evaluation Tool for General Content Addressable Memories

Michael Niemier, Ruibin Mao, Mohammad Mehdi Sharifi, Kunshi Wang, Xunzhao Yin, Kai Ni, Liu Liu, Can Li, Xiaobo Sharon Hu
article en

Abstract

Content addressable memories (CAMs) are special-purpose in-memory computing units that support parallel searches directly in memory. There is growing interest in CAMs for data-intensive applications such as machine learning, data mining, and bioinformatics, which has led to a rapidly growing CAM design space. CAM cells can be implemented exclusively by CMOS or with various non-volatile memory (NVM) devices. In addition to traditional binary and ternary CAMs (BCAMs and TCAMs), analog CAM (ACAM) and multi-bit CAM (MCAM) designs have recently been introduced, which could further improve density, and also support unique in-memory distance functions. Furthermore, aside from the widely-used exact match function, CAM-based approximate match functions, such as threshold match and best match, have been proposed to further extend the utility of CAMs to new application spaces. As the CAM design space is large, evaluating different CAM design options for a given application is both crucial and challenging. This paper presents EvaCAM, a circuit-level modeling and evaluation tool for CAMs. EvaCAM supports TCAM, ACAM, and MCAM designs implemented in either CMOS or NVMs, for both exact and approximate match functions. It also allows for the exploration of different CAM designs under various optimization targets. EvaCAM has been validated against measured data from fabricated chips and detailed SPICE simulations. A comprehensive design space exploration for CAMs is provided to illustrate the impact of various design decisions and to demonstrate the use cases of EvaCAM.

IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsVol. 45(4)
University of Notre Dame (US), Nanjing University of Science and Technology (CN), Zhejiang University (CN), University of Hong Kong (HK)
National Science Foundation
Openalex Percentile: Top 75%
Network Packet Processing and Optimization
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