A 3.51 TOPS/mm <sup>2</sup> Transformer Accelerator Exploiting Bipolar Sparsity and Approximate Gating

Transformer models excel at natural language processing tasks but are challenging to deploy on edge devices due to high memory and computation demands. To address this, we proposed an energy- and area-efficient transformer accelerator. We identify ‘0’ bits in positive and ‘1’ bits in negative 2’s complement activation values as bipolar sparsity. This form of sparsity shares a larger proportion than the traditional bit-level sparsity in transformer models. We propose a bipolar sparsity compressor (BSC) together with a bipolar processing element (BPE) to detect and skip the bipolar sparsity in a bit-group (BG) level during the inference. It reduces a large proportion of ineffective computations and improves throughput. The significant sparsity scheduling (SSS) dynamically adjusts broadcast settings based on BG-level sparsity ratios, balancing the sparsity skipping and memory access. Furthermore, an importance approximate gating (IAG) filters out unimportant tokens/heads during the attention computation by reusing sparsity information from the BSC, further reducing processing latency and energy consumption. Implemented in a 28nm process, the proposed accelerator achieves <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$7.62\times $</tex-math> </inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$12.43\times $</tex-math> </inline-formula> throughput improvements on RoBERTa-B and GPT2-xl, respectively. The area efficiency reaches up to 3.51 TOPS/mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> due to skipping a large proportion of bipolar sparsity, reaching <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4.83\times$</tex-math> </inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$5.85\times $</tex-math> </inline-formula> higher compared with the state-of-the-art approximate computing accelerator and the computing in memory accelerator on the benchmark model.

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Publication Details

Journal
IEEE Transactions on Circuits and Systems I Regular Papers
Published
2025-09-03
DOI
https://doi.org/10.1109/tcsi.2025.3601717
Primary Topic
Pulsed Power Technology Applications
Type
article
Field-Weighted Citation Impact
0.00

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article

A 3.51 TOPS/mm 2 Transformer Accelerator Exploiting Bipolar Sparsity and Approximate Gating

Ka-Fai Un, Pui‐In Mak, Rujian Cao, Wei-Han Yu et al.
IEEE Transactions on Circuits and Systems I Regular Papers
Pulsed Power Technology Applications
article

A 3.51 TOPS/mm 2 Transformer Accelerator Exploiting Bipolar Sparsity and Approximate Gating

Ka-Fai Un, Pui‐In Mak, Rujian Cao, Wei-Han Yu, Zhongyu Zhao, Rui P. Martins
article en

Abstract

Transformer models excel at natural language processing tasks but are challenging to deploy on edge devices due to high memory and computation demands. To address this, we proposed an energy- and area-efficient transformer accelerator. We identify ‘0’ bits in positive and ‘1’ bits in negative 2’s complement activation values as bipolar sparsity. This form of sparsity shares a larger proportion than the traditional bit-level sparsity in transformer models. We propose a bipolar sparsity compressor (BSC) together with a bipolar processing element (BPE) to detect and skip the bipolar sparsity in a bit-group (BG) level during the inference. It reduces a large proportion of ineffective computations and improves throughput. The significant sparsity scheduling (SSS) dynamically adjusts broadcast settings based on BG-level sparsity ratios, balancing the sparsity skipping and memory access. Furthermore, an importance approximate gating (IAG) filters out unimportant tokens/heads during the attention computation by reusing sparsity information from the BSC, further reducing processing latency and energy consumption. Implemented in a 28nm process, the proposed accelerator achieves <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$7.62\times $</tex-math> </inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$12.43\times $</tex-math> </inline-formula> throughput improvements on RoBERTa-B and GPT2-xl, respectively. The area efficiency reaches up to 3.51 TOPS/mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> due to skipping a large proportion of bipolar sparsity, reaching <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4.83\times$</tex-math> </inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$5.85\times $</tex-math> </inline-formula> higher compared with the state-of-the-art approximate computing accelerator and the computing in memory accelerator on the benchmark model.

IEEE Transactions on Circuits and Systems I Regular PapersVol. 73(3)
University of Macau (MO)
Department of Science and Technology of Shandong Province, VNU Science and Technology Development Fund, Universidade de Macau
Openalex Percentile: Top 71%
Pulsed Power Technology Applications
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