Analysis of cascaded H-Bridge multilevel inverters using SPWM with multi-sinusoidal reference

Multilevel inverters have become the preferred choice for medium voltage and high-power applications due to their superior waveform quality, reduced stress on switching components, and overall enhanced performance. Among these, the cascaded H-bridge inverter stands out for its simpler control and modulation techniques, as well as its greater efficiency compared to other multilevel inverter topologies. This paper presents the design and performance evaluation of a cascaded H-bridge multilevel inverter (CHMI) for five, seven, nine, eleven, thirteen, and fifteen levels, utilizing sinusoidal pulse width modulation (SPWM) in MATLAB Simulink. The proposed technique, the multi-sinusoidal reference, is implemented by comparing multiple sinusoidal wave signals with a carrier triangular signal, with the resulting comparison pulses used to control the inverter's switching. The output results indicate that as the number of levels in multilevel inverters increases, the total harmonic distortion (THD) decreases, and the output voltage improves.