Design and analysis of seven-level hybrid modified H-bridge multilevel inverter

This paper introduces a novel boosting multilevel inverter that utilizes switched capacitors. Current multilevel inverters (MLIs) face several issues, such as complex structures, intricate switching controls, and challenges in generating gate pulses, numerous components, and high voltage stress on semiconductors. The increase in the number of levels adds to the complexity and cost of the circuit and can reduce reliability in some cases. The proposed topology creates a 7-level voltage waveform using 9 switches, 1 diode, and 2 capacitors, and it triples the voltage gain. The capacitors maintain self balanced operation without the need for additional circuits. A simple logic gate-based pulse-width modulation (PWM) technique is presented to ensure power balancing of the capacitors. The proposed 7-level switched capacitor boosting multilevel inverter features a reduced switch count, lower voltage stress, and built-in fault tolerance. The paper includes a comprehensive comparison of various related topologies. The proposed topology is simulated in PSIM, with simulation results presented for different parameters.