A second-order CIFF delta-sigma modulator with wide input voltage range using double feedback integration

A second-order delta-sigma modulator (DSM) with a wide input voltage range is proposed for sensor applications. To achieve the characteristics of high resolution and small area, it uses a cascaded-of-integrators feedforward (CIFF) architecture and a successive approximation register (SAR) analog-to-digital converter (ADC) for a 3-bit quantizer. To implement a wide input voltage range, the first integrator of the proposed DSM performs double feedback integration for each sampled input. This makes the proposed DSM, which uses a single power supply, to use the reference voltage from the internal reference driver and have an analog input voltage range twice the reference voltage range without the use of additional capacitors. The second-order DSM is implemented using a 130 nm CMOS process with a supply voltage of 1.5 V. When the sample frequency and oversampling ratio (OSR) are 500 kHz and 125, respectively. The measured SNDR of the implemented DSM is approximately 85.49 dB of SNDR for an input signal of 353 Hz. The active area and power consumption are 0.095 mm 2 and 315.45 μW, respectively.