Design and evaluation of seven-level switched-capacitor boost multilevel inverter with nine switches and the triple voltage gain

A novel switched capacitor multilevel inverter (SCMLI) is introduced in the presented paper. There are several issues with the existing multilevel inverter (MLI) like its complicated structure, complex switching control, difficulty in generating the gate pulse, numerous components, along with the stress of high voltage on the semiconductor switches. There is a noticeable rise in the quantity of semiconductor devices for generating a greater number of levels. In planned topology a seven-level voltage outcome is created by utilising nine-switches, one-diode and two-capacitors. The reduced switch count, reduced amount of voltage stress, low cost factor, lower total harmonic distortion, and built-in fault tolerance capability of the planned 7L-SC-BMLI are the main features of the planned topology. Finally, the functioning and capability of the planned inverter in order to boost the input by a factor of three are validated using MATLAB/Simulink and experimental data on a laboratory prototype.