Photonic interlacing architectures for learning discrete linear unitaries

Recent investigations suggest that the discrete linear unitary group <a:math xmlns:a="http://www.w3.org/1998/Math/MathML"><a:mrow><a:mi>U</a:mi><a:mo>(</a:mo><a:mi>N</a:mi><a:mo>)</a:mo></a:mrow></a:math> can be represented by interlacing a finite sequence of diagonal phase operations with an intervening unitary operator. However, despite rigorous numerical justifications, no formal proof has been provided. Here, we show that elements of <b:math xmlns:b="http://www.w3.org/1998/Math/MathML"><b:mrow><b:mi>U</b:mi><b:mo>(</b:mo><b:mi>N</b:mi><b:mo>)</b:mo></b:mrow></b:math> can be decomposed into a sequence of <c:math xmlns:c="http://www.w3.org/1998/Math/MathML"><c:mi>N</c:mi></c:math>-parameter phases alternating with one-parameter propagators of a lattice Hamiltonian. The proof is based on building a Lie group by alternating these two operators and showing its completeness to represent <d:math xmlns:d="http://www.w3.org/1998/Math/MathML"><d:mrow><d:mi>U</d:mi><d:mo>(</d:mo><d:mi>N</d:mi><d:mo>)</d:mo></d:mrow></d:math> for a finite number of layers. This is numerically verified by using Haar random matrices as targets, showing a convergence for exactly <e:math xmlns:e="http://www.w3.org/1998/Math/MathML"><e:mi>N</e:mi></e:math> layers. As a specific application, we propose an integrated all-optical logic gate device that performs OR, NAND, XOR, and XAND tasks within a lossless and passive optical circuit design.

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Publication Details

Journal
Physical Review Research
Published
2025-09-02
DOI
https://doi.org/10.1103/4vth-6n7q
Citations
3
Primary Topic
Neural Networks and Reservoir Computing
Type
article
Field-Weighted Citation Impact
7.44

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article

Photonic interlacing architectures for learning discrete linear unitaries

Alexey Ovchinnikov, M. Markowitz, Mohammad‐Ali Miri, Kevin Zelaya
3 citations
Physical Review Research
Neural Networks and Reservoir Computing
7.44
article

Photonic interlacing architectures for learning discrete linear unitaries

Alexey Ovchinnikov, M. Markowitz, Mohammad‐Ali Miri, Kevin Zelaya
article en
3 citations

Abstract

Recent investigations suggest that the discrete linear unitary group <a:math xmlns:a="http://www.w3.org/1998/Math/MathML"><a:mrow><a:mi>U</a:mi><a:mo>(</a:mo><a:mi>N</a:mi><a:mo>)</a:mo></a:mrow></a:math> can be represented by interlacing a finite sequence of diagonal phase operations with an intervening unitary operator. However, despite rigorous numerical justifications, no formal proof has been provided. Here, we show that elements of <b:math xmlns:b="http://www.w3.org/1998/Math/MathML"><b:mrow><b:mi>U</b:mi><b:mo>(</b:mo><b:mi>N</b:mi><b:mo>)</b:mo></b:mrow></b:math> can be decomposed into a sequence of <c:math xmlns:c="http://www.w3.org/1998/Math/MathML"><c:mi>N</c:mi></c:math>-parameter phases alternating with one-parameter propagators of a lattice Hamiltonian. The proof is based on building a Lie group by alternating these two operators and showing its completeness to represent <d:math xmlns:d="http://www.w3.org/1998/Math/MathML"><d:mrow><d:mi>U</d:mi><d:mo>(</d:mo><d:mi>N</d:mi><d:mo>)</d:mo></d:mrow></d:math> for a finite number of layers. This is numerically verified by using Haar random matrices as targets, showing a convergence for exactly <e:math xmlns:e="http://www.w3.org/1998/Math/MathML"><e:mi>N</e:mi></e:math> layers. As a specific application, we propose an integrated all-optical logic gate device that performs OR, NAND, XOR, and XAND tasks within a lossless and passive optical circuit design.

Physical Review ResearchVol. 7(3)
Queens College, CUNY (US), The Graduate Center, CUNY (US), City University of New York (US)
National Science Foundation, Alfred P. Sloan Foundation, City University of New York, U.S. Air Force, Air Force Office of Scientific Research
Openalex Percentile: Top 3%
Neural Networks and Reservoir Computing
7.44
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