Towards Optimized Arithmetic Circuits with MLIR

Numerical programs are typically conceived using real numbers.However, programming languages and compiler infrastructures operate at a lower abstraction level, constrained by fixed-width machine arithmetic.This abstraction gap limits the scope of legal arithmetic optimizations and complicates the generation of efficient circuits for application-specific hardware. This work introduces a set of MLIR dialects that explicitly separate concerns between real-valued computation and low-level arithmetic representation.The RealArith dialect captures mathematical intent, enabling algebraic rewrites and approximation-aware transformations, while the FixedPointArith dialect expresses quantized arithmetic with fine-grained control over bit widths.We implement an end-to-end lowering flow that performs polynomial approximation, generating fixed-point Horner-form architectures tailored for hardware synthesis.This separation enables arithmetic optimizations beyond those supported by conventional compilers. We present early hardware results on signal processing benchmarks, demonstrating the potential of our approach for arithmetic-aware circuit generation.Our evaluation includes multiple polynomial approximation schemes, including single and uniform piecewise forms, which highlight trade-offs between arithmetic complexity and memory usage, and compares against Vitis HLS and standard MLIR lowering baselines.