24.86 Gb/s Full-Digital Chaos Random Number 1.53 GSamples/s Noise Generator in 40nm CMOS

This paper presents a fully digital true random number generator (TRNG) and noise generator (NG) based on a chaos system. We design the chaos random number generator (CRNG) using the proposed Euler-based modified Lorenz system with periodic perturbation and modified modulo unit. The chaos NG (CNG) processor integrates the CRNG with Box-Muller modules to produce Gaussian noise signals. This paper also analyzes the impact of step size on the infinite divergence phenomenon and performs the NIST test to ensure CRNG’s mathematical stability and reliability. The chip was designed and fabricated using TSMC 40 nm CMOS technology. The proposed CRNG chip achieves a throughput of 24.86 Gbps at a maximum clock frequency of 259 MHz, with a core power consumption of 17.82 mW and an energy efficiency of 0.717 pJ/bit. This performance achieves the highest throughput among state-of-the-art ASIC-based TRNGs. Additionally, the proposed processor achieves a throughput of 1.53 Gsamples/s with a clock frequency of 255 MHz, a core power consumption of 62.73 mW, and an energy efficiency of 41 pJ/sample. This performance achieves the highest throughput and the best energy efficiency in state-of-the-art works.